Design Rule Checker

Registered by Chad Parker on 2018-08-01

The pcb design rule checker is a convoluted mess that needs some attention. It needs to be deconvolved, modularized, and have an HID that will produce a DRC report.


The saga continues ....


Work Items

Work items:
Define a DRC violation list structure: DONE
Write a HID to output DRC violations to a text file: DONE
Generate a DRC test input file: DONE
Update DRC tests to save pcb files to check for flag preservation: TODO
Verify DRC tests exercise all DRC code: TODO
Check that the DRC test results are as expected: TODO
Refactor DRC code out of find.c: DONE
Make each DRC test its own function: TODO
Allow individual test to be executed: TODO
Allow individual tests to be enabled or disabled: TODO
DRC panel in preferences window: TODO
Identify lesstif requirements for the DRC code: DONE
Highlight both offending objects: DONE
Find all connection identified violations instead of just one: TODO
Check for duplicated DRC violations: TODO
Make DRC functions on DataType: TODO
Graphical output for the DRC report: TODO
LaTeX output for the DRC report: TODO
Identify other places where the "Connection Lookup" code is used: TODO
Write tests for the other "connection lookup" use cases: TODO
Allow plugins to extend the DRC: TODO

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