Cyborg FPGA Bitstream metadata spec

Registered by Li Liu on 2018-03-15

One of the encountered problems is when it comes to bitstream
management, it is difficult to map bitstreams to their appropriate FPGA boards or
reconfigurable regions. The aim of this proposal is to provide a standardized
set of metadata which should be encapsulated together with bitstream storage.

Blueprint information

Status:
Not started
Approver:
None
Priority:
Undefined
Drafter:
Li Liu
Direction:
Needs approval
Assignee:
Li Liu
Definition:
New
Series goal:
None
Implementation:
Unknown
Milestone target:
None

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