Scheduling and the big.LITTLE Architecture

Registered by Paul McKenney on 2012-07-20

This topic is schedule with "Task placement for asymmetric cores":
https://blueprints.launchpad.net/lpc/+spec/lpc2012-sched-task-placement

ARM's big.LITTLE architecture is an example of asymmetric multiprocessing where all CPUs are instruction-set compatible, but where different CPUs have very different performance and energy-efficiency characteristics. In the case of big.LITTLE, the big CPUs are Cortex-A15 CPUs with deep pipelines and numerous functional units, providing maximal performance. In contrast, the LITTLE CPUs are Cortex-A7 with short pipelines and few functional units, which optimizes for energy efficiency. Linaro is working on two methods of supporting big.LITTLE systems.

One way to configure big.LITTLE systems is in an MP configuration, where both the big and LITTLE CPUs are present. Traditionally, most SMP operating systems have assumed that all CPUs are identical, but this is emphatically not the case for big.LITTLE. Therefore, changes for big.LITTLE are required. This talk will give an overview of the progress towards the goal of big.LITTLE support in the Linux plumbing.

Topic Lead: Paul E. McKenney

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Paul McKenney
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