add new meter for l3 cache usage statistics
Registered by
Ren Qiaowei
Some Intel processor families (e.g. the Intel Xeon processor E5 v3 family) introduced CMT (Cache Monitoring Technology) to measure the usage of l3 cache by applications running on the platform. This spec introduces one new meter to get l3 cache usage statistics based on Intel CMT feature.
Blueprint information
- Status:
- Complete
- Approver:
- gordon chung
- Priority:
- Undefined
- Drafter:
- Ren Qiaowei
- Direction:
- Approved
- Assignee:
- Ren Qiaowei
- Definition:
- Approved
- Series goal:
- None
- Implementation:
- Implemented
- Milestone target:
- None
- Started by
- gordon chung
- Completed by
- gordon chung
Related branches
Related bugs
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Whiteboard
Please mark this as depending on the nova supports-perf-event blueprint. -- mriedem
Gerrit topic: https:/
Addressed by: https:/
add l3 cache usage meter
(?)
Work Items
Dependency tree
* Blueprints in grey have been implemented.